AVR-based Robot Hardware

Processor Module

Schematic	Layout	Photograph
Click images to enlarge

The main processor board hosts the processor itself, a buffer stage for driving the infra-red emitters in the eyes, and a second stage amplifier which boosts the signals the eye receives with its photodiodes. Otherwise, the rest of the board is given over to connectors to which the other boards interface.

The processor is IC1, with a 100nF decoupling capacitor C3. Q1 is a 4MHz ceramic resonator, with two 22pF load resistors C1 and C2. In order to mount this as close to the IC as possible, Q1 is mounted diagonally (which cannot be done in Eagle's layout editor, hence the disconnected look to Q1) and C1 and C2 are mounted along the tracks with a between-hole cut separating their leads.

A power-on reset delay is implemented with the R/C network R7 and C9, which also act to debounce the reset switch which is attached via the 2-pin connector labelled RESET.

T1 and R1 constitute an emitter-follower which boosts the current output from pin B3 which is used to drive the infra- red LEDs in the eyes. Software pulses this line at around 1kHz or so, so that we can pick this out from the constant signal of daylight on the photodiodes.

R3 and C9 form another R/C network which is driven from pin B2 and will supply a varying voltage to the negative input of the analog comparator in the processor chip via pin B0. This is a very cheap and simple way of creating a crude analog-to-digital converter. The R/C network is discharged by driving pins B2 and B0 to 0v. Then, the voltage to measure is applied to pin B1, the positive input to the comparator. Setting pin B0 to input and drive pin B2 to high (5v) will ramp the voltage up on pin B0 at a rate determined by R3 and C9. We can then use the counter/timer hardware on the chip to time how long it takes this rising voltage to exceed the measured voltage on pin B1, which gives us a crude measure of what this voltage was. It's not particularly accurate, but it's OK for this application.

The voltage on B1 is supplied by the amplifier consisting of T2, R2, R4 and R5. This is a common-emitter amplifier which is biased to a couple of volts on the output, and driven from the commoned outputs from all three eyes. These outputs are AC-coupled using capacitors on the eyes themselves to eliminate constant inputs such as sunlight.

Connectors are provided for the three eyes, the two bump switches, the RS232 board, the motor board, reset, and power. After this schematic was made, I added an additional 6-pin connector for in-system programming of the main chip, and this can be seen in the top right of the photograph, away from the edge of the board.

Power for the board is supplied by four rechargeable NiCad AA cells, producing a total voltage of around 5.2v when fully charged.

Eyes

Schematic	Layout	Photograph
Click images to enlarge

The eye board consists of an infra-red emitting diode (IRED) and a photodiode with amplifier. The IRED is driven at around 1kHz with a 10% duty cycle, and any light bouncing off an object within a few centimetres will be converted to an electrical signal by the photodiode.

The IRED itself has a second-stage drive transistor T2 (the first stage is the emitter-follower on the main processor board) and a local charge store in C1 to boost the peak current available to the IRED. The higher the peak current, the higher the brightness, and the higher the brightness the larger the detection range. R1 limits the peak current to around 300mA, and R2 acts primarily as a way of charging C1 between shots.

The photodiode D1 is AC-coupled through C2 into a common-emitter amplifier consisting of T1, R3 and R4. This is then AC coupled again, back to the second stage on the main board through C3. This amplifier stage is driven from an output pin on the main processor (which comes in labelled as the PD Select line). This means that we can drive all three IREDs at the same time and use a single A to D measurement system, and select which eye we are looking through by driving the relevant PD select signal high. This allows us to use 3 eyes with only a total of 7 I/O pins on the processor. This is important because we only have 15 at our disposal. Power comes from the main board.

The board layout is designed to isolate the electrical signals from the IRED and the photodiode as much as possible: the tracks between them are driven from Vcc and GND, and the drive signals are kept as far apart as possible in the connecting wires. Not shown on the layout is an opaque shield which sits between the IRED and photodiode. I used an old, flat mica capacitor for this purpose, which you can see in the photograph. (Why I have these things lying around I have no idea, but they occasionally turn out to be useful.)

I also wanted this board to be compact, so I again used the neat trick of laying axial components along the tracks, which is not something one usually does with stripboard.

Motor Driver

Schematic	Layout	Photograph
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The motor board converts the TTL-level outputs from the microcontroller into high-current drive for the motors. It also serves to isolate the motor power supply from the main logic supply.

The motors are driven by a L298N dual bridge driver IC, which comes in a 15-pin package with a slightly odd 0.05 inch pin spacing. These pins are divided into two sets, odd and even, offset from one another by 0.2 inches and staggered. I found that the easiest way to mount these was to bend the outer, odd numbered pins away from the center of the package, putting them back on a 0.1 inch grid and making them compatible with stripoard again. This process of splaying the pins makes the layout look a little messy in Eagle, as it has to be simulated by adding in new "virtual" connectors (SPLAY1 and SPLAY2) to the layout indicating where the bent pins are going to be.

The output from the IC is protected against voltage spikes from the motors by eight fast Schottky rectifier diodes, which will sink any problem voltages into the motor power supply lines. Apart from a couple of decoupling capacitors, these are the only components on this board. The large blank area is space for the heatsink attached to the IC.

Power for the motors is supplied by another four rechargeable NiCad AA cells, which means that 3v motors are appropriate after taking into account the voltage drops across the drive transistors.

RS232 Buffer

Schematic	Layout	Photograph
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The RS232 buffer board converts the TTL-level outputs from the microcontroller into the high-voltage siganl levels required for RS232 transmission.

The main component on this board is again the IC, a MAX232. This contains a charge pump which, with the help of capacitors C3, C4, C5 and C6 produce voltage levels of +10v and -10v from a single +5v supply. These are then used to drive the output level shifters which make up the other half of the chip. C1 is a decoupling capacitor and the whole thing is powered from the main board.

Programming

Schematic	Photograph
Click images to enlarge

The 90S2313, like the majority of the Atmel microcontrollers, is in-system programmable. If we make 5 lines available from the main board (GND, SCK, MISO, MOSI and RESET), then we can reprogram the flash memory in the device without removing it from its socket. Of course, we need a suitable programmer.

PonyProg, by Claudio Lanconelli of www.lancos.com has produced a general purpose programmer which will program virtually anything based on flash memory. The hardware he suggests for interfacing to the parallel port of an IBM PC is robust, but requires a chip I didn't have at the time. So I constructed a much simpler programming cable using four resistors in the signal lines, and a couple of links on the back of the 25 pin connector to persuade it that a printer is attached. R1 to R4 are all 220R resistors.

The whole thing fits neatly inside a cheap hood for the 25 pin connector (see photo).

Laying Out Stripboard with Eagle

General	Busses	Route
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Although Eagle's autorouting module is not designed specifically to do stripboard layouts, it can be persuaded to make a good stab at it by setting up the right kinds of rules.

First, set the grid spacing to 0.1 inch. Then, around each component on the top side of the board, add a "top restrict" area. This prevents the top traces, which ordinarily would be pcb tracks but are wire links for stripboard, from interfering with components.

Then we need to set the routing grid to 0.1 inches, set the preferred direction for the bottom layer to be horizontal, and for the top layer to be vertical, and set an enormous penalty for routing steps away from the preferred direction. We can also weight the board sides to prefer bottom tracks over top tracks, and to minimise the number of vias. See the screen snapshots above for a complete set of rules and weightings. All the optimisation steps are turned off.

Placement of track cuts should be obvious from the end positions of the bottom side tracks. I generally represent these with small "bottom restrict" areas.